Product Summary

The GAL16V8Z-15QP is a Zero Power E2CMOS PLD. The GAL16V8Z-15QP, at 100 μA standby current and 12ns propagation delay provides the highest speed and lowest power combination PLD available in the market. The GAL16V8Z-15QPis manufactured using Lattice Semiconductor’s advanced zero power E2CMOS process, which combines CMOS with Electrically Erasable (E2) floating gate technology. The GAL16V8Z-15QP, Zero Power E2CMOS PLD uses Input Transition Detection (ITD) to put the device in standby mode and is capable of emulating the full functionality. The GAL16V8Z-15QP utilizes a dedicated power-down pin (DPP) to put the device in standby mode. It has 15 inputs available to the AND array.

Parametrics

GAL16V8Z-15QP absolute maximum ratings: (1)Supply voltage VCC: -5 to +7V; (2)Input voltage applied: -2.5 to VCC +1.0V; (3)Off-state output voltage applied: -2.5 to VCC +1.0V; (4)Storage Temperature: -65 to 150℃; (5)Ambient Temperature with Power Applied: -55 to 125℃.

Features

GAL16V8Z-15QP features: (1)ZERO power e2cmos technology, 100μA Standby Current; Input Transition Detection on GAL16V8Z; Dedicated Power-down Pin on GAL16V8ZD; Input and Output Latching During Power Down; (2)High performance e2cmos technology, 12 ns Maximum Propagation Delay; Fmax = 83.3 MHz; 8 ns Maximum from Clock Input to Data Output; TTL Compatible 16 mA Output Drive; UltraMOS Advanced CMOS Technology; (3)E2 cell technology, Reconfigurable Logic; Reprogrammable Cells; 100% Tested/100% Yields; High Speed Electrical Erasure (<100ms); 20 Year Data Retention; (4)Eight output logic macrocells, Maximum Flexibility for Complex Logic Designs, Programmable Output Polarity; Architecturally Similar to Standard GAL16V8; (5)Preload and power-on reset of all registers, 100% Functional Testability; (6)Applications include: Battery Powered Systems; DMA Control; State Machine Control; High Speed Graphics Processing; (7)Electronic signature for identification.

Diagrams

GAL16V8Z-15QP block diagram

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